ddrinit: d56ea12
Ranks:                                                1
Die size:                                             0
Rank size:                                            13 MB
Full size:                                            13 MB
Full SDRAM Width:                                     0 bits
Primary SDRAM Width:                                  0 bits
ECC SDRAM Width:                                      0 bits
Device Width:                                         16 bits
Number of Row Addresses:                              65536
Number of Column Addresses:                           1024
Number of Bank Addresses:                             8
Bank Group Addressing:                                1
Clock Cycle Time (tCK):                               937 ps
Minimum Clock Cycle Time (tCK min):                   0 ps
Maximum Clock Cycle Time (tCK max):                   0 ps
CAS# Latency Time (tAA min):                          18740 ps
Minimum Four Activate Windows Delay (tFAW):           40291 ps
RAS to CAS Delay Time (tRCD min):                     18740 ps
Row Precharge Delay Time (tRP min):                   18740 ps
Active to Precharge Delay Time (tRAS min):            42165 ps
Normal Refresh Recovery Delay Time (tRFC1 min):       0 ps
2x Mode Refresh Recovery Delay Time (tRFC2 min):      0 ps
4x Mode Refresh Recovery Delay Time (tRFC4 min):      0 ps
Short Row Active to Row Active Delay (tRRD_S min):    10307 ps
Long Row Active to Row Active Delay (tRRD_L min):     0 ps
Long CAS to CAS Delay Time (tCCD_L min):              0 ps
Minimum Active to Auto-Refresh Delay (tRC):           60905 ps

DDRMC0: Initialized successfully within 1421256 us, 1 ranks, speed 2134 MT/s
Ranks:                                                1
Die size:                                             0
Rank size:                                            13 MB
Full size:                                            13 MB
Full SDRAM Width:                                     0 bits
Primary SDRAM Width:                                  0 bits
ECC SDRAM Width:                                      0 bits
Device Width:                                         16 bits
Number of Row Addresses:                              65536
Number of Column Addresses:                           1024
Number of Bank Addresses:                             8
Bank Group Addressing:                                1
Clock Cycle Time (tCK):                               937 ps
Minimum Clock Cycle Time (tCK min):                   0 ps
Maximum Clock Cycle Time (tCK max):                   0 ps
CAS# Latency Time (tAA min):                          18740 ps
Minimum Four Activate Windows Delay (tFAW):           40291 ps
RAS to CAS Delay Time (tRCD min):                     18740 ps
Row Precharge Delay Time (tRP min):                   18740 ps
Active to Precharge Delay Time (tRAS min):            42165 ps
Normal Refresh Recovery Delay Time (tRFC1 min):       0 ps
2x Mode Refresh Recovery Delay Time (tRFC2 min):      0 ps
4x Mode Refresh Recovery Delay Time (tRFC4 min):      0 ps
Short Row Active to Row Active Delay (tRRD_S min):    10307 ps
Long Row Active to Row Active Delay (tRRD_L min):     0 ps
Long CAS to CAS Delay Time (tCCD_L min):              0 ps
Minimum Active to Auto-Refresh Delay (tRC):           60905 ps

DDRMC1: Initialized successfully within 1411765 us, 1 ranks, speed 2134 MT/s
Total DDR memory size 4096 MiB
Memory interleaving: 4 KiB, 2-channel
NOTICE:  BL31: v2.6(release):v2.5-887-g9566c09d4
NOTICE:  BL31: Built : 12:17:21, Feb  2 2023